Devices and System Heterointegration (DESH) Group

Prof. Veeresh Deshpande, IIT Bombay

Updates:
First work of Aakash, Harshitha, and Ranie accepted at DRC 2025 Conference! Congratulations!
ITO FET based Capacitor-less Leaky Integrate and Fire Neuron," Aakash Deshpande, Harshitha Gangu, Ranie S. Jeyakumar, Laxmeesha Somappa, and Veeresh Deshpande
Veeresh Deshpande invited for a talk at DRC 2025
New members, welcome!
Sai Shubham and Sandeep Kumar join as Tech. Dev. Engineers. They will be working on memory array design for IMC chiplets. Amit Kumar joins for PhD in our group. He will work on digital design for IMC based AI accelerator chiplet.
Openings:
Open PhD positions:
If you are interested and passionate in working on device fabrication or IC design for in-memory computing, neuromorphic, and quantum computing, join us! All we look for is enthusiasm to learn, and healthy sense of humor. For PhD admission details [PhD Admissions: EE website]
Open MTech RA positions:
If you are interested and passionate in working on chiplet-to-chiplet communication IC design, feel free to reach out by email. This work will be done with Prof. Shalabh Gupta (EE). Admission procedure: [MTech Admissions: EE website]